<feed xmlns="http://www.w3.org/2005/Atom">
	<title>OpenSPARC Checkpoint</title>
	<subtitle>
		
	</subtitle>
	<id>@wiki</id>
	<link href="http://sparccheckpoint.atwiki.com/"/>
	<author>
		<name>56582</name>
	</author>
	<updated>
		2008-05-03T03:07:52Z
	</updated>
	
		<entry>
		<title>
			Solaris on FPGA
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Solaris%20on%20FPGA" />
		

		<id>@wiki::25/</id>
		<published>
			2008-04-03
			
		</published>
		<updated>
			2008-05-03T03:07:52Z
		</updated>
		
		
				
		<summary>
			Boot Notes
0xff f000 0000 
+0x0 reset
+0x20 
		</summary>
	</entry>
		<entry>
		<title>
			Tools
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Tools" />
		

		<id>@wiki::24/</id>
		<published>
			2007-11-18
			
		</published>
		<updated>
			2008-04-01T22:58:12Z
		</updated>
		
		
				
		<summary>
			
GNU Assembler from Binutils 2.18

the assembler has been updated to support the extended SPARC
ISA
file modified is opcodes/sparc-opc.c
configured for the sparc-sun-solaris target


		</summary>
	</entry>
		<entry>
		<title>
			delete1
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/delete1" />
		

		<id>@wiki::23/</id>
		<published>
			2007-11-18
			
		</published>
		<updated>
			2007-11-18T02:24:54Z
		</updated>
		
		
				
		<summary>
			GNU Assembler from Binutils 2.18
-the assembler has been updated to support the extended SPARC ISA
-file modified is opcodes/sparc-opc.c
-configured for the sparc-sun-solaris target
		</summary>
	</entry>
		<entry>
		<title>
			General Purpose Registers
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/General%20Purpose%20Registers" />
		

		<id>@wiki::22/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2007-11-01T15:55:39Z
		</updated>
		
		
				
		<summary>
			
ugekjsdjkf

		</summary>
	</entry>
		<entry>
		<title>
			Floating Point Registers
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Floating%20Point%20Registers" />
		

		<id>@wiki::21/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2008-05-03T06:09:04Z
		</updated>
		
		
				
		<summary>
			





Name
 
Bits
Desc
File
Checkpoint
Rollback
Commit


bw_r_frf
ASR0
64 wide 128 entries
Floating Point register File
 bw_r_frf.v
 
 
 


 
 
 
 
 
 
 
 




		</summary>
	</entry>
		<entry>
		<title>
			template
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/template" />
		

		<id>@wiki::20/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2007-11-01T05:41:15Z
		</updated>
		
		
				
		<summary>
			
 
 

 

		</summary>
	</entry>
		<entry>
		<title>
			Speculative Data Cache
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Speculative%20Data%20Cache" />
		

		<id>@wiki::19/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2007-11-01T04:05:56Z
		</updated>
		
		
				
		<summary>
			
    This cache implements the
write-back policy. A new “Speculative” state is added to each line. This allows
the cache to differentiate cache blocks that was written after a checkpoint was
taken. If a speculative block has to be evicted, the corresponding block in the
next lower hierarchy will be marked as “Speculative”.
    However if the following level is
the main memory or a normal cache, then the checkpoint will be discarded and
all blocks in “Speculative” state will be changed to “Dirty”. This effectively
commits all operations after a checkpoint. On the event of a rollback, every
speculative cache block will be invalidated.
    The proposed design allows quick
checkpoint taking. On the other hand, rolling back or committing a checkpoint
is very expensive because a full traversal of the cache is needed.

		</summary>
	</entry>
		<entry>
		<title>
			Write History Queue
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Write%20History%20Queue" />
		

		<id>@wiki::18/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2008-04-18T03:17:37Z
		</updated>
		
		
				
		<summary>
			
    Write history queue is used to
save the data in memory that is overwritten by post-checkpoint store
operations. After a checkpoint is taken, every subsequent store operation will
cause the old data and its memory address to be stored in the write history
queue. The WHQ will ignore further writes to the same address as we are only
concern with the original value to perform a rollback.     
    When a checkpoint is committed,
the data and address stored in the write history queue will be dumped. However,
on the event of a rollback, the data in the queue will be written back into the
memory at the corresponding addresses. In addition, all caches in the higher
hierarchy have to be flushed.
    This design allows quick
checkpoint taking and checkpoint committing. However, it has a terrible
rollback performance and might be slower during speculative mode compared to
the other methods since it allows writes to the main memory.

		</summary>
	</entry>
		<entry>
		<title>
			Gated Store Buffer
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/Gated%20Store%20Buffer" />
		

		<id>@wiki::17/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2007-11-01T04:05:16Z
		</updated>
		
		
				
		<summary>
			
    A gated store buffer is a component that temporarily holds
all memory stores generated after the checkpoint. In speculative mode, it acts
as a storage location to hold both the address and data for a memory store
operation. Newer stores to the same address will overwrite the old data in the
buffer.
    After the buffer is filled up, the
checkpoint has to be committed and data in the buffer will be transferred
sequentially to the memory. The GSB can instantly roll back to the previous
memory state by discarding the stored data and disabling the GSB.
    This implementation allows quick
checkpoint taking and rolling back. However checkpoint committing is expensive
because all the data in the buffer need to be written into the memory. We could
possibly pipeline the write-back operation so that the processor could resume
normal execution earlier.

		</summary>
	</entry>
		<entry>
		<title>
			About Us
		</title>
		<link href="http://sparccheckpoint.atwiki.com/page/About%20Us" />
		

		<id>@wiki::16/</id>
		<published>
			2007-11-01
			
		</published>
		<updated>
			2007-11-01T05:38:55Z
		</updated>
		
		
				
		<summary>
			
Department of Electrical and Computer Engineering
Carnegie Mellon University
 
Students

Teck Hua Lee: teckl AT ece.cmu.edu
Tze Chang Ng: tcng AT ece.cmu.edu
Wei Jie Lee: weilee AT ece.cmu.edu

 
Advisor

Prof. James Hoe: jhoe AT ece.cmu.edu

 
Credits

Jared Smolens - OpenSPARC development and simulation setup
Fall 2007 18-741 course staff - Feedback for the transactional memory
evaluation class project


		</summary>
	</entry>
	
</feed>